The focus of this workshop is to bring together researchers in the areas of compilers, computer architecture, and synthesis to discuss the assembly of future system-on-a-chip designs. A key focus of the workshop is the design of highly customized SoCs to meet challenging cost, power, and performance objectives of future embedded computer systems. Automatic synthesis is expected to be a key technology to reduce non-recurring engineering costs and time-to-market. This workshop will bring together researchers with industrial and academic expertise to examine these issues.

• Application-specific architectures and synthesis
• Compiler-directed hardware synthesis
• Customized SoC synthesis
• Design of hardware accelerators
• Design space exploration
• Programmability and its affects on architecture
• Reconfigurable fabrics and systems
• SoC platform architectures
• Strategies for reducing time-to-market and NRE

The workshop program will consist of a series of invited presentations from leading industrial and academic research groups, followed by periods of discussion with the audience. Audience participation is strongly encouraged.